R&D

Verification Engineer – Israel North Site

Israel | North Site | Updated: September 26, 2021

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    Job Description

    Will Join a multi-tasking dynamic team. Will be In charge of planning (architecture) and developing (coding) all the needed simulation environments for tests and debugs. The simulation environments are used to develop new RTL blocks, Full-chip integration, FPGA code and also to debug and resolve bugs found.

    Job Requirements

    • BSC in Electrical Engineering
    • At least 3 years’ experience as a verification engineer.
    • Knowledge in Specman – an advantage.
    • Knowledge in UVM – an advantage

    Apply for this position

      Valens is committed to protecting and respecting your privacy. We would like to contact you about our products and services, as well as other content that may be of interest to you. You may unsubscribe from these communications at any time.

      For more information on how we are committed to protecting your privacy, please review our Privacy Policy.

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