R&D

Backend Designer

Israel | Valens HQ | Updated: September 21, 2023

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Job Description

Full physical implementation of digital blocks from Netlist to GDSII. Be a part of the backend team activities in chips aimed for the pro AV and the Automotive products.

Technical responsibilities:

  • Implement full P&R flow of Hierarchical level blocks & Top level from Netlist to GDSII:
  • Place
  • Clock tree synthesis
  • Route
  • STA, Sign-off
  • Physical verification – DRC, LVS, ANT etc.

Job Requirements

  • BSc in electrical engineering or higher.
  • 5+ years of experience in Automatic Place & Route, Block level and Top
  • Knowledge in writing scripts in TCL.
  • Good social, verbal, and leadership skills.
  • Capable of working in a multi discipline / multi-site environment

 Advantages

  • Fluent English.
  • Acquaintance with various aspects and considerations of place and route in full chip and block level flows from netlist to GDS: Floor plan, circuit, IR drop and EM prevention etc.
  • Experience with Cadence P&R flow and tools
  • Acquaintance with advanced nodes (16nm and below)

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