Senior Digital Physical Designer

Israel | Valens HQ | Updated: August 22, 2023

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Job Description

Digital Physical design of mixed signal circuits in advanced technology nodes. Be a part of the layout team activities in mixed signal chips aimed for the pro AV and the automotive products.

Technical responsibilities:

  • Layout tasks in Top chip and block level:
  • Top chip Floor planning
  • Physical verification (Top & Block level) – DRC, LVS, PERC
  • Top Power mesh implementation
  • IO ring implementation
  • RDL routing
  • Integration of analog and mixed signal IPs

Job Requirements

  • Practical engineer graduate or higher in electrical engineering.
  • 5+ years of experience in digital chips, block level and Top
  • Experience working at 28nm and 16FF nodes
  • Knowledge in Matching techniques, STD cell design, IO rings.
  • Good acquaintance with Innovus/ICC and physical verification environment.
  • Good social and verbal skills.
  • Capable of working in a multi discipline / multi-site environment and meet tight schedules.


  • Fluent English.
  • Acquaintance with various aspects and considerations of mixed signal full chip design flow from netlist to GDS: Floor plan, IO ring implementation, IR drop and EM prevention, bump map, Full chip integration of mixed signal circuits design.
  • Experience in layout of circuits in Advanced nodes – 28nm, 16FF and below
  • Acquaintance with Mentor Calibre and/or Cadence PVS
  • Experience in interfacing Automatic PnR team (LEF/DEF flow, Innovus).
  • Knowledge in writing scripts in TCL, python.

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