The qualified candidate will join the DSP & Algorithms Group, for development, analysis, and parameters optimization of Hardwired DSP algorithms for wire-line high speed communication blocks such as: adaptive equalizers, crosstalk cancellers and timing control loops etc.
Working environment includes MATLAB and Simulink system modeling, C-code SW writing, and debugging over FPGA platforms using time & frequency domain analysis methods.
- MSC in Electrical Engineering from a well-known university.
- At least 3 years of experience as DSP Engineer with expertise in communication systems.
- Experience with DSP algorithms implementation, using Digital architectures (e.g. FIR/IIR, parallel Filters implementation, etc.), including deep knowledge with Fixed-Point tradeoffs.
- Proven Experience with using MATLAB environment.
- Experience with writing and debugging Micro-Controller’s SW for real-time DSP control algorithms – An advantage